Προηγμένα Θέματα Αρχιτεκτονικής Υπολογιστών
Code | 3.4.3352.8 |
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Semester | 8th |
Category | |
Credits | 6 |
Class Hours - Lab Hours | 3 - 1 |
Lecturers | Nectarios Koziris, Dionisios Pnevmatikatos, |
Description
Instruction Set Architectures (ISA), modern CPU organization: control unit and datapath, pipelined architectures, memory hierarchy organization (cache memories, virtual address translation, TLB), multistage pipelines with variable latencies, branch prediction. Instruction Level Parallelism (ILP), superscalar pipelines, out of order (OOO) execution, Very large Instruction Word (VLIW) architectures, GPUs. Examples of modern processors, hyperthreading (HT), Simultaneous Multithreading (SMT), Multicore chips (Chip Multiprocessing). Cache coherence and memory consistency models.