Advanced Topics in Computer Architecture


Code 3.4.3352.8
Semester 8th
Flow Y - Computer Systems
Category Obligatory (main flow)
Credits 6
Class Hours - Lab Hours 3 - 1
Lecturers Nectarios Koziris, Dionisios Pnevmatikatos, ΠΔ 407/80 ή ΑΥ

Description

Instruction Set Architectures (ISA), modern CPU organization: control unit and datapath, pipelined architectures, memory hierarchy organization (cache memories, virtual address translation, TLB), multistage pipelines with variable latencies, branch prediction. Instruction Level Parallelism (ILP), superscalar pipelines, out of order (OOO) execution, Very large Instruction Word (VLIW) architectures, GPUs. Examples of modern processors, hyperthreading (HT), Simultaneous Multithreading (SMT), Multicore chips (Chip Multiprocessing). Cache coherence and memory consistency models.