POETICS Project Launch


The Photonics Communications Research Laboratory (PCRL) of the School of Electrical and Computer Engineering (ECE) of the National Technical University of Athens (NTUA) coordinates the POETICS project.

POETICS was officially kicked off on January 14-15, 2020, at the Institute of Communications and Computer Systems (ICCS) of ECE-NTUA in Athens, Greece. All eight (8) members of the consortium were gathered for a two-day productive meeting and worked together to review the project work plan and the lines of action, define immediate actions and goals, and conduct detailed planning.

POETICS is a H2020 Research and Innovation project funded by the European Union aiming to bring the optical interconnect technology with all performance, functionality and cost credentials and allow the Datacenter (DC) networks to scale and the 5G wired infrastructures to grow.

Enabling terabit-capacity optical interconnects requires a paradigm shift in the packaging approach. The electrical interconnect distance between the optical engine (OE) and the digital switching chip must be minimized, signal conditioning chips and unwanted components, like sockets that would otherwise be required and would inevitably lead to increased power consumption and reduced signal integrity, should be removed. It also requires the right combination of photonic and electronic technology to be integrated in order to deliver high performance, low-cost and energy efficient optical engines.

POETICS will develop novel Terabit optical engines and optical switching circuits and co-package them with digital switching chips to realize Multi-Chip Modules (MCM) for next generation switching equipment with >12.8 Tb/s capacities and very high energy efficiency that fit into the roadmap of vendors. In order to achieve these goals POETICS will utilize SiGe BiCMOS, InP, PolyBoard and TriPleX technologies and rely on hybrid integration, which allows the selection and combination of the best performing components.

The specific targets in POETICS are to develop:

  • MCM with 1.6 Tb/s OEs based on 8-fold InP-EML arrays (200 Gb/s per lane) and PolyBoard with parallel SMFs on par with the PSM/DR spec for 500 m - 2 km intra-DC connectivity;
  • MCM with 1.6 Tb/s OEs based on 8-fold InP-EML arrays (200 Gb/s per lane) and 3D PolyBoard with duplex MCFs for 5G optical fronthaul applications;
  • low-power-consumption 3D Benes optical switch;
  • MCM coherent 64 Gbaud OEs with up to 600 Gb/s capacity of DC interconnect applications within 80 – 120 km reach on par with 400G-ZR specification.

All news, publications, and other outputs of the project will be available on the official project website at ict-poetics.eu.