Σχεδίαση Αναλογικών Ηλεκτρονικών Συστημάτων
| Code | 3.5.3310.8 |
|---|---|
| Semester | 8th |
| Category | |
| Credits | 6 |
| Class Hours - Lab Hours | 2 - 2 |
| Lecturers | Georgios Panagopoulos, Ioannis Panagodimos |
Description
Analysis and design of phase-locked loop (PLL) architectures and circuits for communication systems. Emphasis on fundamental understanding, design intuition, and implementation of PLLs in modern-day circuits (positive and negative feedback, hysteresis, VCOs, frequency dividers, phase/frequency detectors, charge pumps and loop filters). Topics include phase locking, acquisition, tracking, speed, bandwidth, noise properties of PLLs. In addition, measurement techniques such as frequency dependent behaviour, spectrum analysis and phase noise. The applications are focused on frequency multiplication, rf frequency synthesis as well as clock and data recovery. The purpose of the laboratory is the analysis, design and implementation of a PLL system, based on specifications, with discrete components or as integrated circuit.