PhD thesis defense to be held on June 21, 2024, at 16:00 (Webex)

Picture Credit: Vassilis Alimisis

Thesis title: Integrated Circuit Architectures for Classical and Neural Computing with Applications in Artificial Intelligence.

Abstract: In this doctoral thesis, low-power circuits were studied, designed, and implemented using analog computing, soft computing and edge computing techniques. Based on these circuits, activation functions were implemented, which are useful for the implementation of machine learning algorithms. Additionally, hardware-friendly architectures for machine learning algorithms were studied, designed, and implemented, and applied to real-world problems. The structure of the present doctoral thesis is as follows. Initially, a general introduction to Machine Learning and traditional algorithm implementation methods is provided, along with the prevailing trends in recent years, new methods with the introduction of hardware-friendly implementations, and the motivation behind the present thesis. Then, the thesis continues with a literature review and classification of circuits implementing the Gaussian function. Relevant applications and proposed architectures complement the second chapter. The third chapter refers to a series of new circuits and architectures that were designed, studied, and analyzed in detail for the first time in this thesis, which are related to the implementation of the Gaussian function. The fourth chapter deals with implementation architectures for classifiers using Gaussian Mixture Model and Bayes models. The basic circuit unit is the Gaussian function implementation circuits. All implementations are approximations of the mathematical model governing machine learning algorithms/models. The fifth chapter describes in detail the methods and topologies for implementing Radial Basis Function and Centroid-based Classifiers in machine learning models/algorithms. The distance function is implemented with the help of the Gaussian function. The sixth chapter presents a new approach to architectures aimed at implementing not only classification but also learning in hardware. Based on the above, new architectures for implementing the Support Vector Machine and Threshold algorithm were introduced. A variety of applications, both medical (thyroid, epilepsy, anesthesia control, and others) and interdisciplinary, were studied in all cases. The seventh chapter presents a generalized design methodology for Bell-shaped classifiers, which aims to group the previous categories. The eighth chapter outlines the content of three works related to the implementation of Edge detectors in hardware, aimed at peak detection with circuits operating in the Subthreshold region, offering low consumption. The ninth chapter analyzes architectures based on Fuzzy Logic, aiming to implement classifiers and controllers using circuits operating in the Subthreshold region. The tenth chapter presents implementations of Neural Networks and more complex models. It also offers a generalized comparison of previous architectures in interdisciplinary applications. In the summary and future work, the conducted research is evaluated, the conclusions are summarized, and future goals are set.

Supervisor: Professor Paul P. Sotiriadis

PhD Student: Vassilis Alimisis