PhD Thesis Final Defense to be held on July 20, 2017, at 14:00
The examination is open to anyone who wishes to attend.
Thesis Title: Plasmonic (DLSPP) Devices Integrated on Silicon Platform for Optical Interconnects in High Perfromance Computing systems
Over the last years, the emerging demands in the field of HPC (High Performance Computing-HPC) interconnects for ultra-high capacity, low energy consumption, high integration density has pushed towards practical solutions based on optical interconnects instead of the electrical approaches. This paradigm shift has been implemented employing the portfolio of Photonic Integrated Circuits (PICs). Since the electrical bottleneck sets the capacity and power consumption limits for the on-chip and chip-to-chip communication, the diffraction-limit introduces the physical limitations in the world of integrated optics. Plasmonic interconnects overcome the above barriers by combining the nm-scale size of electrical interconnects with the unlimited bandwidth and low power consumption of optical interconnects into the same technology approach.
The main objective of this PhD thesis is the design, characterization and experimental demonstration of active plasmonic elements based on DLSPP waveguides for on-chip switching configurations. The great promise of the proposed DLSPP switching concept is the ultra-high throughput, small footprint and low power consumption. The implementation path is based on the development of a hybrid router consisting of active circuitries based on DLSPP waveguides and passive circuitries based on SOI photonic waveguides. This hybrid integration topology is based on the comparative benefits of both integration technologies: The low-loss propagation and low-coupling loss of SOI platform for passive functionalities and the sub-wavelength size and inherently low-energy consumption of DLSPP platform for active functionalities. In this line, the 2x2 switching functionality is presented employing the thermo-optic effect as the on-chip switching mechanism.
The passive platform that hosts the active plasmonic element is based on the development of Rib-type SOI waveguides which offer low-loss on-chip communication and low fiber-to-chip coupling loss. Two different types of SOI waveguides were designed, fabricated and tested to ensure the optimum performance for guiding the TM polarization mode on the Silicon platform. A large number of experimental studies were carried out to evaluate the performance of passive SOI circuitries on the probe station. Experimental results focusing on the coupling loss of grating couplers, propagation loss of Rib-type waveguides were also included following the cutback method for a large set of grating structures of different design parameters.
The development of DLSPP waveguides was pursued by presenting PMMA-loaded DLSPP waveguide structures hetero-integrated on SOI passive platform. The design and experimental evaluation of Si-to-DLSPP interfacing point is successively discussed showing low coupling loss between the silicon waveguides and the plasmonic part for the TM polarization mode. The propagation loss of plasmonic waveguides as well the quality performance of PMMA-loaded structures was also performed through experimental measurements on probe station of PCRL premises. The experimental evidence of data capture was demonstrated showing 10Gb/s NRZ-OOK transmission through a 60-μm long dielectric loaded SPP waveguide. High-rate OTDM transmission of fs-scale RZ optical data pulses at 160Gb/s through the Si-DLSPP straight waveguide was also experimentally investigated.
The WRR-based (Waveguide Ring Resonator WRR) switching concept using active DLSPP components is thoroughly discussed in the next chapter. The design, fabrication and static optical characterization are reported using a large number of experimental results. The PMMA-loaded plasmonic microrings which are controlled via thermo-optic mechanism were experimentally evaluated focusing mainly on the energy consumption and other thermal-related metrics. Taking a step forward, using polymers for dielectric loadings that exhibit higher TOC (Thermo-Optic Coefficient-TOC) values are desirable to drastically reduce the switching power. In this line, the polymer Cyclomer has been adopted to experimentally demonstrate thermo-optically controlled dual-ring switching configurations.
At the end, the switching concept based on Asymmetric Mach-Zehnder Interferometer (A-MZI) is introduced. The presented switching element relies on the use of thermo-optic control on A-MZI branches to achieve high quality 2x2 switching operation on WDM architectures. Experimental measurements are presented to address the static and dynamic features of the Cyclomer-loading DLSPP switch while the impact of hetero-integration of active plasmonics on the silicon chip was also under test. The performance evaluation was carried out under real traffic conditions by experimentally demonstrating the successful switching operation of 10 Gb/s NRZ-encoded continuous data traffic. The obtained results are reported as the first experimental evidence of the proper switching credentials of active plasmonics based on Cyclomer loading SPP waveguides. To quantify the above benefits owing to the footprint reduction enabled by using Cyclomer as the polymer loading instead of PMMA, we introduced a performance factor (figure of merit) that associates the power consumption, the response time and the active length of a switching element.
Supervisor: H. Avramopoulos (Professor)
PhD student: Ioannis Yiannoulis